Logic gates and combination or deduction of gates

LOGIC GATES

In conventional electric circuit we use electric pulses of various types which may be of sinusoidal form or any other type. In digital electronic (branch of electronics which has led to development of computers, calculators, digital watches etc). We use electric pulses which has only two values called high value or low value. One such pulse having values 5 V and 0 at different tes in shown in [Fig. 1.]. Since binary algebra is based on two digits 1 and 0, use if binary system in digits electronics seems to be logical. Now onwards we shall denote high level by 1 and low level by 0. The development of digital electronics is based upon some electrical circuits called logic gates. 

 

Fig. 1. High (1) and low (0) signals. 

   

     A logic gate is a circuit having one or more than one input but having one output only. 

     These are three basic logic gates, 

1. OR gate. 
2. AND gate. 
3. NOT gate. 

1. OR gate (Addition) 

     OR gate is the electrical circuit whose output is high when one or more of its inputs are high. 

      i.e. output is present when one or all the inputs are present. 

     OR gate works as a number of switches in parallel (Fig. 2). A closed switch means a high level signal denoted  by 1 while an open switch means a low level signal denoted by 0.

     Let A and B denoted as inputs, then X = A + B shall be the output. 

Fig. 2. Equivalent circuit for OR gate. 

     Case (i) Switches S₁ and S₂ both open (A = 0, B = 0). No current will flow through the bulb (X = 0). In this case both the inputs A and B are 0 while the output X is also 0. The state is represented by first line in the truth table. 

     Case (ii) Switch S₁ is closed (A = 1) while S₂ is open (B = 0). Current flows through the bulb indicating that there is output in the circuit (X = 1). The state is represented by the second line in the truth table. 

     Case (iii) Switch S₁ is open (A = 0) and S₂ is closed (B = 1). Current flows through the circuit (X = 1). The stage is represented by the third line in the truth table. 

     Case (iv) Both the Switches S₁ and S₂ are closed (A = 1, B = 1). Current flows through the circuit (X = 1). The stage us represented by fourth line in the truth table. 

Fig. 3. Symbolic representation. 

     The circuit diagram and its symbolic representation for OR gate is shown in [Fig. 3 (i) and (ii)] respectively. 

     From the circuit diagram we can see that all the inputs are given to the positive terminals of the diodes D₁ and D₂ whose negative terminals are connected to earth through a 5 KΩ resistance. When the both inputs are zero (A and B connected to E), no current flows through 5 KΩ resistance. So there will be zero voltage drop across the resistance (output X = 0). When any of the input, say A is connected to 5 V (high level voltage). Diode D₁ starts conducting thus sending the current through the resistance. This gives a high level output (X = 1). Same argument holds good for A = 0, B = 1, (A connected to E and B connected to S) and for A = 1, B = 1 (A and B both connected to S). 

2. AND gate (Multiplication) 

     AND gate is an electric circuit which gives a high output (X = 1) only when all the inputs to the gate are high. Here output is present when all inputs are present. 

     If when the inputs is zero, there is no output also. Thus AND gate can be visualised as an electric circuit containing a number of switches in series with each other [Fig. 4(i)]. Mathematically it is represented by the equation X = AB. 

     It can be seen from [Fig. 4(i)] that current will flow through the bulb (X = 1) only if both the switches S₁ and S₂ are closed (A = 1, B = 1) as shown in fourth line of truth table [Fig. 4(ii)]. If any or both of the switches are open (A = 0, B =0), there is no output (X = 0) in the circuit. These stages are represented by the first three lines of the truth tables. 

Fig. 4. Equivalent circuit for AND gate. 

     The circuit diagram and the symbolic representation of AND gate is shown in [Fig. 5(i) and (ii)] respectively. 

     From [Fig. 5(i)] it is clear that Vc = 5 V is applied to the positive terminal of each diode through a resistance of 5 kΩ. If any of the diodes A or B has its negative terminal at zero voltage (connected to E), that diode will become forward biased. So current will flow and whole of the voltage drop due to Vc will be across the resistance of 5 kΩ and there will be no voltage at the output. Now imagine A and B both connected to S. None of the two diodes is forward biased. Therefore no current flows through 5 kΩ resistance. Whole if 'Vc' will be received directly at the output. Hence, when all inputs are high (= 1) , only then the output will be high (= 1).

Fig. 5. AND gate. 

3. NOT gate (Inverter) 

     NOT gate is an electrical circuit which inverts the nature of signal fed to its input. Output is present when the input is absent and vice versa. 

     A high signal (= 1) given to the input of a NOT gate appears as a low signal (= 0) at the output and vice versa. Since this acts as inverter only, it has only one input. The circuit diagram, symbolic representation and the truth table of a NOT gate is shown in [Fig. 6(i), (ii), (iii)] respectively. 

     The circuit consists of a transistor (say NPN) whose emitter-base circuit can be forward biased. 'Vc' (= 5 V) is connected to the collector through a resistance of 2.2 kΩ while the output is taken across the collector and earth. 

Fig. 6. NOT gate. 

     When a high (= 1) input is give to NOT gate (by connecting A and S), emitter base circuit becomes forward biased thus, sending a current through the collector circuit. This current produces a voltage drop across the resistance of 2.2 kΩ in collector circuit. There is no output (X = 0). On connecting A and E (input A = 0) there is no current in the circuit. Therefore, almost all of the voltage of Vc = 5 V is received across the output (X = 1). These two stages are represented in truth table [Fig. 6(iii)]. 

Combination of gates

We can produce some combinations of gates by using two or more gates, already developed (NOR and NAND gates) in series with each other. The output of one will be made the input of the other. These new combinations are highly useful in the development of digital circuit. 

(i) NAND gate

     It consists of a combination of AND gate and NOT gate in such a way that the output of AND gate is made as the input of NOT gate. Here output is absent when all inputs are present.  

     The schematic representation, symbolic representation and the truth table of NAND gate is shown in [Fig. 7 (i), (ii), (iii)] respectively. 

Fig. 7. NAND gate. 

     It may be noted from Fig. 7(iii) that intermediate level X' (= AB) is the output of AND gate while X (= ĀB̄) is the final output of the combination. 

(ii) NOR gate

     It consists of a combination of a OR gate and NOT gate in such a way that the output of OR gate is made the input of NOT gate. Here output is present when all inputs are absent. 

     The schematic representation, symbolic representation and the truth table of a NOR gate is shown in [Fig. 8(i), (ii), (iii)] respectively. 

Fig. 8. NOR gate. 

     Thus, a NOR gate gives a low output (= 0) in all the cases except when all its inputs are low. 

Deduction of OR ,AND and NOT gates from NAND  and NOR gates

It can be shown that a repeated use of NAND and NOR and yield OR, AND and NOT gate. Therefore, NAND and NOR gates act as the basic circuits for the development of digital instruments. 

(i) NOT gate from NAND gate

     To obtain a NOT gate from a NAND gate we connect all the inputs of a NAND gate with each other, so that there is one output to one input. The schematic representations is shown in Fig. 9(i).

Fig. 9. NOT gate from NAND gate. 

     The truth table of the combination is given in Fig. 9(ii). Comparing Fig. 9(iii) and Fig. 9(ii) it can be seen that this table represents a NOT gate. 

(ii) AND gate from NAND gate

     To obtain AND gate from NAND gate, the output of one NAND gate is connected to both the inputs of second NAND gate. The output of second NAND gates is the final output. The schematic representation and its truth table are shown in [Fig. 10(i) and (ii)] respectively. 

Fig. 10. AND gate from NAND gate. 

     Comparing Fig. 4(ii) and Fig. 10(ii), it can be seen that this truth table is same as that of AND gate. 

(iii) OR gate from NAND gate

    To get OR gate from NAND gate, we shall make use of three NAND gates. NAND gate N₁ has its inputs short circuited. So it acts as a NOT gate. Same is the case with NAND gate N₂ . The outputs of N₁ and N₂ are connected to the inputs of a third NAND gate N₃ whose output X is the final output. The schematic representation and its truth table is shown in [Fig. 11(i) and (ii)] respectively. 

Fig. 11. OR gate from NAND gate. 

     A comparison of Fig. 2(ii) and Fig. 11(ii) tells us that this truth table is same as that of OR gate. 

Binary number system, Conversion and arithmetic operations

 BINARY NUMBER SYSTEM

The number system which we use in our daily life is decimal number system. We can represent all digits from zero to infinity as a combination of numbers from 0 to 9. For example, 63 is represented as a combination of 6 and 3. In decimal system, each digit used to represent a particular number has a particular weight. A digit in unit place, has a lesser weight than a digit in ten's place. This is clear from the following illustration. 

    Let a decimal number be "ABCD". Here A, B, C, D are all decimal digits. The weight of these digits are given below :

    Weight ⟶       10³           10²         10¹       10⁰

    Digit  ⟶           A              B             C           D

    Therefore, the number 'N' can be written as

         N = A × 10³ + B × 10² + C × 10¹ + D × 10⁰

     If A = 5, B = 3, C = 7, D = 0

    Then N = 5 × 10³ + 3 × 10² + 7 × 10¹ + 0 × 10⁰

                  = 5000 + 300 + 70 + 0

                  = 5370.

    Binary system runs in a similar manner with a difference that it expresses all numbers as a combination of 0 and 1 while the 'weight' is assigned to the place as powers of 2 (instead of powers of 10 as in decimal system) : 0 and 1 are called binary digits or simply bits ('b' is taken from binary and 'it's from digits). 

    Illustration. Let a number written in binary system be 01011.

    Weight ⟶     2⁴         2³        2²          2¹         2⁰ 

    Digit ⟶         0           1          0            1          1

    Therefore, the number 'N' can be written as 

       N = 0 ×2⁴ + 1 × 2³ + 0 × 2² + 1 × 2¹ + 1 × 2⁰

           = 0 + 8 + 0 + 2 + 1

           = 11

    Thus, '01011' in binary system represents 11 in decimal system. 

Conversion of a number from binary system to decimal system

Procedure

1. Write the binary number and then multiply the binary number with the power of 2 (from right to left). 
2. Add the products after multiplication. 
3. That is the decimal equivalent of the binary number. 

Example

     Therefore, the required decimal number is "52". The result can be written in either of the following two ways :

                (110100)₂ = (52)₁₀

                (110100)binary = (52)decimal

Conversion of a number from binary system to octal system

     As we know in octal system there is  3 digits. 

   

Numbers	Binary form
0	0       0       0
1	0       0       1
2	0       1       0
3	0       1       1
4	1       0       0
5	1       0       1
6	1       1       0
7	1       1       1

1. First write the binary numbers; example - 110010.
2. Then grouped them in 3 digits; example - 110     010.
3. Write the value of each 3 digits; example - 110 = 6, 010 = 2.
4. Then add the values ; example - 110010 = 62.
5. That is the octal equivalent of the binary number. 

Example

     Therefore, the required octal number is "64". The result can be written in either of the following two ways :

              (110010)₂ = (64)₈

       

              (110010)binary = (64)octal 

Conversion of a number from binary system to hexadecimal system

     As we know in hexadecimal system there is 4 digits. 

Numbers	Binary form
0	0      0      0      0
1	0      0      0      1
2	0      0      1      0
3	0      0      1      1
4	0      1      0      0
5	0      1      0      1
6	0      1      1      0
7	0      1      1      1
8	1      0      0      0
9	1      0      0      1
10 (A)	1      0      1      0
11 (B)	1      0      1      1
12 (C)	1      1      0      0
13 (D)	1      1      0      1
14 (E)	1      1      1      0
15 (F)	1      1      1      1

 

1. First write the binary numbers; example - 10011100.
2. Then grouped them in 4 digits; example - 1001     1100.
3. Write the value of each 4 digits; example - 1001 = 9,  1100 = 12.
4. Then add the values; example - 10011100 = 912 = 9C.
5. That is the hexadecimal equivalent of the binary number. 

Example

     Therefore, the required hexadecimal number is "34". The result can be written in either of the following two ways :

             (110100)₂ = (34)₁₆

             (110100)binary = (34)hexadecimal 

Conversion of a number from decimal system to binary system

Procedure

1. Take the integral decimal number and divided by 2.
2. Represent the reminder value at the right hand side. 
3. Assume the quotient value as the dividend and continue the step 1 and 2 untill unless you are not getting the quotient value below 2.
4. Represent the right hand side value from button to top. 
5. This is the binary equivalent of the decimal number. 

Example 

       Let us write 52 in binary system

     Therefore, the required binary number is "110100". The result can be written in either of 5he following two ways :

                      (52)₁₀ = (110100)₂ 

    or             (52)decimal = (110100)binary   

     It may be noted that the indices 10 and 2 in the two representations give the base of the system of representation. 

     This can be easily verified as follows

     Weight ⟶   2⁵     2⁴      2³      2²      2¹      2⁰

     Bites ⟶       1       1        0       1        0       0     

    ∴     N = 1 × 2⁵ + 1 × 2⁴ + 0 × 2³ + 1 × 2² + 0 × 2¹ + 0 × 2⁰

              = 32 + 16 + 4

              = 52

Conversion of a number from decimal to octal

Procedure

1. Take the decimal number and divided by 8.
2. Represent the reminder value at the right hand side. 
3. Assume the quotient as dividend and continue step 1 and 2 until unless you are not getting a value less than 8.
4. Represent the right hand side value from buttom to top. 
5. That is the octal equivalent of the decimal number. 

Example 

      Let us write 165 in octal system

     Therefore, the required octal number is "245". The result can be written in either of the following two ways :

                     (165)₁₀ = (245)₈

     or            (165)decimal = (245)octal      

     It may be noted that the indices 10 and 8 in the two representations give the base of the system of representation. 

     This can be easily verified as follows

     Weight ⟶      8²        8¹        8⁰

      Bites ⟶         2          4          5

     ∴     N = 2 × 8² + 4 × 8¹ + 5 × 8⁰

                = 128 + 32 + 5

                = 165

Conversion of a number from decimal system to hexadecimal system

Procedure

1. Take the decimal number and divided by 16.
2. Represent the reminder value of the result at right hand side. 
3. Assume the quotient value of the result on dividend and continue step 1 and 2 until unless you are not getting value less than 16.
4. Represent the right hand side value from buttom to top. 
5. That is the hexadecimal equivalent of the decimal number. 

Example

     Therefore, the required hexadecimal number is "2A". The result can be written in either of the following two ways :

                      (42)₁₀ = (2A)₁₆

     or             (42)decimal = (2A)hexadecimal

     It may be noted that the indices 10 and 16 in the two representations give the base of the system of representation. 

     This can be easily verified as follows

     Weight ⟶      16¹        16⁰

     Bites ⟶           2            10

     ∴     N = 2 × 16¹ + 10 × 16⁰

                = 32 + 10

                = 42

Conversion of a number from octal system to binary system

     We know in octal system there is 3 digits. 

1. First write the octal numbers; example - (305)₈
2. Then write the binary numbers of each octal numbers; example - 3 = 011, 0 = 000, 5 = 101.
3. Add the binary numbers; 011   000   101 = 011000101.
4. That is the binary equivalent of the octal number.    

Example

     Therefore, the required binary number is "010100101". The result can be written in the following two ways :

             (245)₈ = (010100101)₂

             (245)octal = (010100101)binary  

Conversion of a number from octal system to decimal system

1. Write the octal number and then multiply the octal numbers with the power of 8 (from right to left). 
2. Add the products after multiplication. 
3. Then the final result is the decimal equivalent of the octal number. 

Example 

     Therefore, the required decimal number is "165". The result can be written in either of the following two ways :

    

               (245)₈ = (165)₁₀

          

               (245)octal = (165)decimal

Conversion of a number from octal system to hexadecimal system

     We know in hexadecimal system there us 4 digits. 

1. First write the octal number; example - 425.
2. Then write the binary numbers of each octal numbers; example - 4 = 0100, 2 = 0010, 5 = 0101.
3. Add the binary numbers like this - 0100   0010     0101 = 010000100101 = 115.
4. The final result is the hexadecimal equivalent of the octal number. 

Example

     Therefore, the required hexadecimal number is "A5". The result can be written in the following two ways :

             (245)₈ = (A5)₁₆

             (245)octal = (A5)hexadecimal 

Conversion of a number from hexadecimal system to binary system

1. Write the hexadecimal number; example - 8B  (B = 12).
2. Then write the binary numbers if each hexadecimal number; example - 8 = 1000, 12 = 1100.
3. Add the binary numbers; example - 10001100.
4. That is the binary equivalent of the hexadecimal number. 

Example

     Therefore, the required binary number is "101010". The result can be written in the following two ways :

              (2A)₁₆ = (101010)₂

              (2A)hexadecimal = (101010)binary 

Conversion of a number from hexadecimal system to decimal system

1. Take the hexadecimal number; example - 6C (C = 13).
2. Multiply the hexadecimal number with the power of 16; example - 6 × 16¹ + 13 × 16⁰.
3. Add the product after multiplication. 
4. The final result is the decimal equivalent of the hexadecimal number. 

Example

     Therefore, the required decimal number is "42". The result can be written in the following two ways :

                 (2A)₁₆ = (42)₁₀

                 (2A)hexadecimal = (42)decimal 

Conversion of a number from hexadecimal system to octal system

     We know in octal system there is 3 digits. 

1. Take the hexadecimal number; example - 3B (B=11). 
2. Write the hexadecimal numbers into binary numbers; example - 3 = 0011, 11 = 1011.
3. Then grouped them in 3 digits like this - 00111011 = 111   011.
4. Write the octal number of each binary numbers like this - 111 = 7,  011 = 3.
5. Add the octal numbers = 73.
6. The final result is the octal equivalent of the hexadecimal number. 

Example

    

     Therefore, the required octal number is "52". The result can be written in the following two ways :

            (2A)₁₆ = (52)₈

            (2A)hexadecimal = (52)octal 

Addition in binary system - "concept of carry"

Let us suppose the reading of speedometer of a car at any instant is 000999. When the next kilometer is covered one has to be added to the first nine on the right hand side (in unit place). So, it becomes 0 and 1 is added  at tens place. This 1, which is added to the next place when the count at a particular place increases to highest digit of the system is called carry. So, addition of 0 and 1 is 1. In case of addition of 1 and 1 the result increases beyond the highest available digit (1) in binary system. So, we write 0 and carry 1 to the next column as was done in case of addition of 000999 + 1. Thus, following rule shall be obeyed in addition of binary system. 

     (i) 0 + 0 = 0                      

    (ii) 0 + 1 = 1

   (iii) 1 + 0 = 1                   

   (iv) 1 + 1 = 0 ;   carry 1

Example

     1011 = 11,    0111 = 7

     1011 + 0111 = 10010

      (11)  +  (7)    = 18

Subtraction in binary system 

Subtraction of binary numbers result is binary number. 

     (i) 0 - 0 = 0

    (ii) 0 - 1 = 1 ; borrow 1

   (iii) 1 - 0 = 1

   (iv) 1 - 1 = 0

Example

     1101 = 13,   0110 = 6

     1101 - 0110 = 0111

      (13)  -  (6)    = 7

Multiplication in binary system

Multiplication of binary numbers is same as multiplication of natural numbers. 

Example

     0101 = 5,   1101 = 13

     0101 × 1101 = 1000001

     (5)    ×   (13) = 65

Division in binary system

Division of binary numbers is similar to division of natural numbers. 

Example

     1100 = 12,   10 = 2

     1100 ÷ 10 = 110

      (12) ÷ (2) = 6

Transistor, its characteristics and constants

 Transistor

It is a semi-conductor device which plays the same role as that played by a vaccum tube triode. 

     Construction. It consists of an 'N-type' or 'P-type' crystal sandwitched in between two other types of crystals. The central piece is known as base while the others on the two sides are known as emitter and collector.

Fig. 1.

The emitter, collector and the base play the same role as that played by filament, plate and the grid of a vaccum tube triode. The base of the transistor has to be very thin and low doped as compared to the emitter and collector. This is required to minimise the loss of charged carriers due to recombination. Two types of transistors, 'N-P-N' and 'P-N-P' transistors, are shown in [Fig. 2(i) and (ii)] respectively along with their schematic diagrams. 

           (Click on image to see it clearly) 

Fig. 2. Working of a transistor. 

     Biasing. The emitter base circuit of the transistor is always forward biased while the collector base circuit is always reverse biased. 

     Fig. 2(i) shows the circuit diagram for an 'N-P-N' transistor. The emitter base circuit is forward biased by connecting negative terminal of a source of e.m.f. 'Veb' to emitter and positive terminal to base (P-type). The collector base circuit is reverse biased by connecting positive terminal of a source of e.m.f. 'Vcb' with collector C and negative terminal to the base. Three microammeters are connected in the circuit to note emitter current 'Ie', collector current 'Ic', and base current 'Ib'. Circuit diagram of 'P-N-P' transistor on similar guidelines is shown in Fig. 2(ii).

Transistor action

     Transistor action is the term applied to the process of explaining the passage of electric current through a transistor. 

     Let us consider the circuit diagram of 'N-P-N' transistor [Fig. 2(i)]. With 'Veb' applied as shown in [Fig. 2(i)], electrons in the emitter section are repelled and injected into base. Since P-region (base) is not highly doped and is very thin, most of the electrons diffuse through it and reach the collector section. About 5% of the electrons are lost as charge carriers because of combination with the holes in 'P-region'. Remaining electrons which have already crossed over to the collector section are rapidly swept by the collector voltage. For each electron flowing out of the collector and entering the positive terminal of 'Vcb' which again moves towards the base and the process is repeated. Thus, current through the transistor is due to motion of electrons from emitter to collector while conduction current in the external circuit is also due to motion of electrons but from collector to emitter. The collector current 'Ic' is approximately 0.95 'Ie' where 'Ie' is the emitter current. 

     In case of a 'P-N-P' transistor biased as shown in [Fig. 2(ii)], positive terminal of 'Veb' repels the hole in emitter region. As these holes cross over to the base which is 'N-type', some holes (about 50%) get lost by capturing free electrons. Remaining holes cross over to the collector region and are attracted by the negative terminal of 'Vcb'. As each hole reaches the collector terminal, an electron is emitted from the negative terminal of 'Vcb' and neutralises the hole. For each hole that is lost, a covalent bond near the emitter electrode breaks down and the liberated electron leaves the emitter electrode amd enters the positive terminal of the emitter battery. The new hole that is formed moves towards the base and undergoes the same process as explained above. So, current flowing through a 'P-N-P' transistor takes place the conduction of holes from emitter to collector, while conduction current in the external circuit is carried by the electrons. 

     The emitter current 'Ie', collector current 'Ic', and base current 'Ib' (due to neutralisation of hole in base region) are shown by micro-ammeters, M₁, M₂, M₃ are connected in the circuits. It will be onserved that 

                  Ie = Ic + Ib

Modes of transistor operation

There are three electrodes of a transistor. One of these electrodes is held common or grounded. The term 'common' is used with that electrode which is common to both input and output circuits. The common electrode is generally earthed. Therefore, the word grounded is also used. According these are three modes for operation of transistor. The input and the output impedances of the transistor vary from one mode to the other. 

     (i) Common-base operations. In this type of operation base terminal is common to both input and output circuits. Transistor circuit and its equivalent vacuum tube circuits are shown in [Fig. 3(i) and (ii)] respectively. In this case, the input impedance is high. 

Fig. 3. Common base operation. 

    (ii) Common-emitter operation. In this type of operation the emitter forms the common electrode. A common non emitter arrangement for a transistor and vacuum tube are shown in [Fig. 4(i) and (ii)]. In this case, the input impedance is low while the output impedance is medium to high. 

Fig. 4. Common emitter operation. 

   (iii) Common-collector operation. The collector forms the common terminal in input and output circuits are shown in [Fig. 5 (i) and (ii)]. In this case, the input impedance is high and the output impedance is low. 

Fig. 5. Common-collector operation. 

     There can be a number of ways in which transistor characteristics can be plotted. Two very commonly used characteristics of a transistor are given below :

Transistor characteristics

Corresponding to the three types of connections for operation of transistor, we have a three types of transistor characteristics. 

     1. Common base connection (CB mode). The circuit diagram of CB mode of N-P-N transistor is shown in Fig. 6(i) while that of P-N-P transistor is shown in Fig. 6(ii). Three milliammeters A, B and C indicate emitter current 'Ie', base current 'Ib' and collector current 'Ic' respectively. Veb is the emitter base voltage while Vcb is the collector base voltage. It may be noted that emitter circuit is forward biased while collector circuit is reverse biased. Circuit between emitter and base is the input circuit while that between collector and base is the output circuit. 

Fig. 6. Circuit diagram. 

     Following characteristics can be drawn from these connections. 

     (a) Input characteristics. Input characteristics of a transistor, is common base operation is a graph between emitter current (Ie) and emitter-base voltage (Veb) at constant collector-base voltage (Vcb). 

     Input characteristics for N-P-N and P-N-P transistors in common base mode are shown in Fig. 7(i) and (ii), respectively. 

     Input characteristics can be yield the value of input resistance of the transistor. 

     Input resistance (ri) of a transistor in common base operation is defined as the ratio between change in emitter-base voltage (∆Veb) to the change in emitter current (∆Ie) at constant collector-base voltage (Vcb). 

            ri = [∆Veb/∆Ie]Vcb = Constant

Unit of ri is 'ohm'. 

Fig. 7. Input characteristics. 

    (b) Output characteristics. Output characteristics of a transistor in common base operation is a graph between collector-base (Vcb) voltage and the collector current (Ic) at constant emitter current (Ie). 

     Output characteristics for N-P-N transistor and P-N-P transistor in common base operation are shown in Fig. 8(i) and (ii), respectively. 

Fig. 8. Output characteristics (CB mode). 

     Output characteristics can be yield the value of output resistance (r0) of the transistor. 

     Output resistance of a transistor in common base operation is defined as the ratio between change in collector-base (∆Vcb)  voltage to the change in collector current (∆Ic) at constant emitter current (Ie). 

                r0 = [∆Vcb/∆Ic]Ie = Constant

Unit of r0 is 'ohm'. 

     (c) Transfer characteristics. It is a graph between collector current (Ic) and emitter current (Ie) keeping collector-base (Vcb) constant. 

Fig. 9. Transfer characteristics. 

     Transfer characteristics is shown in Fig. 9. This characteristics is very useful in determining the effect of change in current of input circuit (due to signal) in the output. 

     2. Common emitter connection. The circuit diagrams for CE connection of N-P-N transistor and P-N-P transistor are shown in Fig. 10 (i) and (ii), respectively. In the case, the emitter is common to both input and output circuits. Circuit between base and emitter is the input circuit while that between collector and emitter is the output circuit. 

Fig. 10. Circuit diagram. 

     Following characteristics can be drawn from these connections. 

(a) Input characteristics

     Input characteristics of a transistor in common emitter operation in the graph between emitter base voltage (Veb) and base current (Ib) at a constant, collector emitter (Vce) voltage. 

     Input characteristics of N-P-N transistor and P-N-P transistor in common emitter operation are shown in Fig. 11 (i) and (ii), respectively. 

Fig. 11. Input characteristics (CE mode). 

     We can calculate the value of input resistance (ri) from the input characteristics. 

     Input resistance of a transistor in common emitter operation is defined as the ratio between change in emitter-base (∆Veb) voltage to change in base current (∆Ib) at constant collector-emitter (Vce) voltage. 

                ri = [∆Veb/∆Ib]Vce = Constant

Unit of ri is 'ohm'. 

(b) Output characteristics

     Output characteristics of a transistor in common emitter operation is a graph between collector-emitter (Vce) voltage and collector current (Ic) keeping base current (Ib) constant. 

     Output characteristics of N-P-N transistor and P-N-P transistor in common emitter operation are shown in Fig. 12 (i) and (ii), respectively. 

     We can calculate the value of output resistance (r0) from output characteristics. 

Fig. 12. Output characteristics (CE mode). 

     Output resistance of transistor in common emitter operation is defined as the ratio between change in collector emitter (∆Vce) voltage to the change in collector current (∆Ic) at constant base current (Ib). 

                r0 = [∆Vce/∆Ic]Ib = Constant

Unit of r0 is 'ohm'. 

(C) Transfer characteristics

     It is a graph between collector current (Ic) and base current (Ib) at constant collector emitter voltage, Vce . 

          It is a straight line as shown in Fig. 13.

Fig. 13. Transfer characteristics. 

3. Common collector connection : (CC mode) 

     The circuit diagrams of CC mode of N-P-N and P-N-P transistors in common collector mode of connections are shown Fig. 14 (i) and (ii), respectively. 

     Collector base circuit forms the input circuit while the emitter-collector circuit forms the output circuit. Generally, its input characteristics are not drawn because of low voltage and power gain in this mode of connection. 

Fig. 14. Common collector mode. 

Transfer characteristics

     Transfer characteristics of a transistor in common collector mode of connections is a graph between base current (Ib) and emitter current Ie at constant emitter collector (Vce) voltage. 

     The transfer characteristics is shown in Fig. 15. 

Fig. 15. Transfer characteristics. 

Transistor constants

Depending upon the mode of operations the performance of a transistor is specified in terms of some constants known as transistor constants. 

Important notes 

1. The base region of a transistor is always narrow. 
2. The base region is always low doped. 
3. Input circuit of a transistor is always forward biased while the output circuit is always reverse biased. 

Key words

1. Transistor. A semi-conductor device having one type of semi-conductor sandwiched between two other types of semi-conductor. 

2. Transistor action. Process of conduction of a transistor. 

3. Transistor region. A small region having a potential gradient due to contact potential. 

Key Formulae

Transistor constants

   

     (a) Current amplification factor or forward current transfer ratio (∝). 

   

     (i) ∝ = [∆Ic/∆Ie]Vcb = constt. = [Ic/Ie]Vcb = constt. 

                [For common base operation]

(ii) β = [∆Ic/∆Ib]Vcb = constt. = [Ic/Ib]Vcb = constt. 

               [For common emitter operation]

     (b) Current transfer ratio (γ) 

γ = [∆Ie/∆Ib]Vce = constt. = [Ie/Ib]Vce =constt.

                [For common collector operation]

(c) Relation between transistor constants

(i) β terms of ∝ : β = ∝/1 - ∝

(ii) ∝ in terms of β : ∝ = β/1 + β

(iii) γ in terms of ∝ : γ = 1/1 - ∝

(iv) γ in terms of β : γ = 1 + β